Shradha Saxena

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Shradha Saxena

...LECTURER at JP, Noida, India
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  • Organic Electronics
  •  Nanoscale Devices
  •  Microelectronics
  •  Novel Device/Circuit co-Design Methodologies
  •  Organic Semiconductor Materials & Devices
  •  Analog & Digital communication.

·        M. Tech:  in Solid State Electronics Material’ from Indian Institute of Technology (IIT) Roorkee, INDIA. M. Tech dissertation work on ‘Organic Thin Film Transistor & its Applications’.
·         B. Tech: Electronics and Communication Engineering from Uttar Pradesh Technical University, Lucknow, INDIA in 2007 with 79%.
·         Intermediate (10+2): from UP Board, Allahabad, INDIA in 2002, with 74.6% marks.
·         High School (10th): from UP Board, Allahabad, INDIA in 2000, with 76.7% marks.


·         Lecturer, Department of Electronics & Instrument Engineering, Meerut Institute of Engineering & Technology, Meerut from September, 2007 to July, 2010.


·    Expertise: In C, VHDL, X85 Assembly Language Programming.
·   Electronic Software: SILVACO (Device & Process Simulator Tool), Multisim 7(TSPICE), MAT 2010, Origin Pro, CAD, and Xilinx.
·  Telecommunication: Transmission Media Technologies and Mobile communication Protocols.
· Teaching experience (in B. Tech equivalent courses): Network Analysis, Electromagnetic Theory, Principles of Communication, Microwave & Wave propagation, Microprocessors, Antenna.
·   Operating Computer, Internet, MS-Office, DOS, MS-Windows 9x/XP/NT/Vista/7, and Linux.


M. Tech level
  Dissertation:
  IIT, Roorkee [Dept. of Electronics & Computer Engg]
Modeling and Simulation of OTFT’s and their Applications (1 year)
Organic Thin Film Transistor (OTFT) is under constant development as a future candidate for low cost display applications and flexible circuitry because of their compatibility with flexible substrates. Transistors based on organic semiconductors (conjugated polymers or small molecules) as active layer to control electric current flow are known as Polymeric or Organic thin film transistors (PTFTs/OTFTs). This project deals with contact resistance based analytical modeling of Bottom Gate Top Contact (BGTC) and Bottom Gate Bottom Contact (BGBC) OTFT structures and also analyze device/circuit co-design methodologies for Organic inverter and Organic static random access memory.
Project:
  IIT, Roorkee [Dept. of Electronics & Computer Engg]
Analysis of Characteristics of Different OTFT (6 months)
This project deals deep analysis and simulation of TGBC, TGTC, BGBC, BGTC OTFT structures ATLAS TCAD tool.

B. Tech level
Major Project:
Mobile Switching using SS7 Protocol (6 month)
Through this project, I have implemented Switching system through VHDL programming, where switching system implies data transmission between two communicating entities. This transmission can be either via trunks or it can be completely wireless, technically termed as Landline Switching and Mobile Switching respectively. It converts entire bulky switching unit (consisting of routers, multiplexers, decoders, counters) to a single IC.
Minor Project:
16-Bit Micro Processor (1 month)
In this project, a 16 bit microprocessor has been designed using VHDL programming. This Processor has quality of scalability.


[1]     Saxena, S., Kumar, B.,  Kaushik, B. K., Negi, Y. S., and Verma, G. D., “Organic Thin Film Transistors: Analytical Modeling and Structures Analysis”, Proc. IEEE Int. Conf. on recent advances in information technology (RAIT-2012), ISM Dhanbad, March, 15-17, 2012.
[2]     Kumar, B., Student IEEE Member, Saxena, S., Kaushik, B. K., IEEE Member, Negi, Y. S.,and Verma, G. D., “Analytical Modeling of Contact Effect in Top and Bottom Contact Organic Thin Film Transistors”, Proc. IEEE Int. Conf. on symposium on computers and informatics (ISCI-2012), Penang, Malaysia, March, 18-20, 2012. (Accepted)
[3]     Kumar, B., Mittal, P., Saxena, S., Kaushik, B. K., IEEE Member, Negi, Y. S.,and Verma, G. D., “Analytical Modeling and Staggered-Planar Structural Analysis for Organic Field Effect Transistor”, Proc. IEEE Int. Conf. on signal processing, computing and control (ISPCC-2012), Jaypee University of Information Technology, Waknaghat, March, 15-17, 2012.


·         National level Seminar on, “Distributed Computing”, at HBTI, Kanpur.
·         M. Tech Seminar on, “Polymer/Organic Thin Film Transistors: Applications and Challenges Ahead”.
·         B. Tech Seminar on, “Smart Antenna Systems”.
·         Summer Training on, “VHDL Programming”, at CETPA InfoTech Pvt. Ltd, Roorkee, from June, 2006 to July 2006.
·         Summer Training on, “Transmission Media Technologies”, at Bharat Sanchar Nigam Limited, Meerut, from June 2005 to July 2005.
·         Workshop on, “Programmable Logic Controller Programming”, organized by PLC InfoTech Ltd., for 6 days in April, 2007.  

·  Scholarship of INR 28,000/- from Nice Society Institutions by Late Mr. BHAIRON SINGH      SHEKHAVAT, the Honorable Vice President of India in 2004.
·         Achieved INR 2,000/- in Project Competition organized by Pepteller Infotech, Meerut.
·        OVERALL Semesters’ & Years’ TOPPER during pursuing B. Tech in session 2003-07.